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FAN8620B
12V Spindle Motor and Voice Coil Motor Driver
Features
Spindle Motor Driver
* * * * * * * Soft commutation Spindle brake after retract Adjustable brake delay time 1.5A max. current power driver Low output saturation voltage: 1V typical @1.2A PWM decoder & filter for soft commutation The external circuit (ASIC) based start-up, commutation and motor speed control
Description
The FAN8620B is an ASIC combination chip, designed for the HDD application, it includes the following functions: spindle motor drive, voice coil motor drive, retract and power management. To drive and control the spindle, the external ASIC provides the appropriate control signals (Start up, commutation, speed control) to the FAN8620B. The spindle motor condition is monitored by the FG output and the motor speed control is accomplished via the PWMSP input. The ASIC controls the voice coil motor current via PWMH and PWML inputs and the power management circuit always monitors the power supply voltages.
Voice Coil Motor Driver
* * * * * * * Trimmed low offset current 1.2A max. current power driver Gain selection and adjustable gain Automatic power failure retract function Class AB linear amplifier with no dead zone Low output saturation voltage: 0.8V typical @1.0A Internal full bridge with VPNP (Vertical PNP) & NPN transistors
48-QFPH-1414
Power Monitoring
* * * * Power on reset with delay Hysteresis on both power comparators Over temperature & over current shut down 5V and 12V power monitor threshold accuracy 2%
Others
* Can be used with 5Volt and 3.3Volt control signals(CNTL1,CNTL2 & CNTL3) for ASIC Interface
Package
* 48QFPH (48 pin quad flat package heat-sink)
Typical Application
* Hard disk drive (HDD)
Ordering Information
Device FAN8620B Package 48-QFPH-1414 Operating Temp. 0 ~ 70C
Rev. 1.0.0 May. 2000.
(c)2000 Fairchild Semiconductor International
1
FAN8620B
Pin Assignments
SENSE12 CBRAKE
PWMSP
CCOMP 38
BRAKE
PVCC1
CNTL3
CNTL2
CNTL1
CFSP
GND
TAB
48
47
46
45
44
43
42
41
40
39
37
U
PWMSF CFSF ADJ SENSE5 VDD FG
1 2 3 4 5 6
36 35 34 33 32 31
N SUBGND V PCS W SUBGND
TAB
FAN8620B
7 8 9 10 11 12 30 29 28 27 26 25
TAB
VREF MCLK HALFVCC POR CDLY GAINSEL
ERROUT VDD ERRIN VCM+ PGND SENSEOUT
13
14
15
16
17
18
19
20
21
22
23
24
CFVCM
PWMH
VCC
SUBGND
FILOUT
SENSE
CRET
PWML
PVCC2
2
VCM-
TAB
CRET2
RRET
FAN8620B
Pin Definitions
Pine Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Pin Name PWMSF CFSF ADJ SENSE5 VDD FG VREF MCLK HALFVCC POR CDLY GAINSEL PWMH PWML CFVCM CRET VCC FILOUT SENSE CRET2 PVCC2 VCM(-) SUBGND RRET SENSEOUT PGND VCM(+) ERRIN VDD ERROUT SUBGND W I/O I O O I O O I I I O I O O O I O O Pin Function Description PWM input for spindle soft commutation Capacitor for spindle PWM soft commutation filter Reference voltage adjustable Adjustable threshold voltage to 5V 5V power supply Frequency generation to spindle speed Voltage reference output for ASIC power Clock from ASIC for commutation 1/2 VCC pin Fault output(Power On Reset & Thermal Shut Down) Delay capacitor for power on reset VCM current Amplifier gain selection PWM signal input (MSB) PWM signal input (LSB) Filter capacitor for VCM PWM control Delay capacitor for retract 12V power line VCM PWM output VCM current sense Amplifier input Power for VCM retract 12V power line for VCM output VCM negative output Ground Adjustable maximum retract current VCM current sense Amplifier output Ground VCM positive output VCM error Amplifier negative input 5V power supply VCM error Amplifier output Ground Spindle motor W phase output
3
FAN8620B
Pin Definitions (Continued)
Pine Number 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name PCS V SUBGND N U CCOMP BRAKE CBRAKE PVCC1 SENSE12 GND CNTL1 CNTL2 CNTL3 PWMSP CFSP I/O O O O O I I I I Pin Function Description Spindle output current sensing Spindle motor V phase output Ground Spindle motor neutral point Spindle motor U phase output Spindle output control compensation Dynamic brake Back-EMF charging capacitor for brake power 12V power line for spindle Adjustable for threshold voltage to 12V Ground Control input for spindle and brake Control input for start-up clock and soft commutation Control input for VCM Amplifier & retract PWM input for spindle speed control Filter capacitor for spindle PWM control
4
FAN8620B
Internal Block Diagram
POR Vreg
Power-on Reset
CNTL 1,2,3
Interface
FG MCLK
PWMSF Custom Digital ASIC Spindle Motor Driver
U V W N 3-Phase BLDC Motor
PWMSP
VCM+ VCM-
GAINSEL PWMH
PWML
Voice Coil Motor
Voice Coil Motor Driver
Retract Brake
FAN8620B
5
FAN8620B
Equivalent Circuits
PWM decoder filter input of Spindle part PWM decoder filter Capacitor of Spindle part
VDD
VDD +
22 #1, #47 #2, #48 + -
-
100
Internal switch
Internal Referecnce Voltage
Regulator part
Sense5 input
VDD VDD 27 #3 VDD #4 27 Internal 1.3V +
#7
FG output
MCLK input
VDD
VDD
50k 27 #6 #8 27 50k
50k
6
FAN8620B
Equivalent Circuits (Continued)
VCM power amplifier reference Power on reset part
VDD #17 27 #11 12.6k #9 12.6k #10 27 VDD 50k + VDD
15
TSD
Internal 2.5V
VCM gain selection input
VCM PWM high input
VDD
VDD
27 #12
10k #13 10k
27
10k
500
Internal switch
VCM PWM low input
VCM PWM filter Capacitor
VDD VCC 27 #14 #15 + 15.6 3k
+ + -
Internal switch
Internal 4V
7
FAN8620B
Equivalent Circuits (Continued)
Filtered VCM PWM command output VCM current sense input
VCC VCC + #18 Internal DEC OUT #19
Capacitor for retract power
Maximum retract current set input
U 30 VCC
V
W VCC
27 #20 Retract Block #24
2k
Spindle motor output compensation Capacitor
Spindle motor output and Back-EMF sensing part
VCC VDD VCC #32, 34, 37 VCC 60 #38 #33 VCC 60 #36 + + Internal 4.2V Retract Block
8
FAN8620B
Equivalent Circuits (Continued)
Dynamic brake part CNTL1, 2, 3 input
VCC VDD 40 VDD 2k #40 27 #44, #45, #46 27 #39 8k
VCC
U
VCM output and control part
#17
VCC #9 #30 Internal 4V VCC + 60 #28 VCC VCC #25 60 + + #22 #42 + #27
VCC
Sense12 input
VCC
60
#19
Internal 4V
9
FAN8620B
Absolute Maximum Ratings (Ta = 25C)
Parameter Maximum signal block supply voltage for 5V line Maximum signal block supply voltage for 12V line Maximum power block supply voltage for 12V line Maximum output current of Spindle motor Maximum output current of VCM Power dissipation Storage temperature Maximum junction temperature Operating ambient temperature Symbol VDDMAX VCCMAX PVCCMAX ISOMAX IVOMAX PD TSTG TJMAX TA Value 6.0 15.0 15.0 2.0 1.2 3.0
note
Unit V V V A A W C C C
-55 ~ 125 150 0 ~ 70
Notes: 1. Power dissipation is reduced 16mW / C for using above Ta=25C. 2. Do not exceed Pd and SOA(Safe Operating Area).
Power Dissipation Curve
Pd[mW] 3,000
2,000
1,000 0
SOA
0
25
50
70
100
125
150
175
Ambient temperature, Ta [C]
Recommended Operating Conditions (Ta = 25C)
Parameter Supply voltage Supply voltage for logic circuit Symbol VCC, PVCC1, PVCC2 VDD Min. 10.8 4.5 Typ. 12.0 5.0 Max. 13.2 5.5 Unit V V
10
FAN8620B
Electrical Characteristics
(Ta=25C, unless otherwise specified) Parameter SUPPLY CURRENT(1) IDD1 IDD2 IDD3 IDD4 ICC1 ICC2 ICC3 ICC4 VTH12 VHYS12 V12 VTH5 VHYS5 V5 ICPOR VTHPOR VPOH VPOL TdPOR VCTL1H ICTL1H VCTL1L ICTL1L CNTL1= Low Brake Mode (CNTL1= Low) Stand by Normal Mode ( CNTL1 = CNTL3 = High ) Retract Mode (CNTL3=Low) Brake Mode ( CNTL1 =Low) Stand by Normal Mode ( CNTL1 = CNTL3 = High) Retract Mode (CNTL3 =Low) VCC=Sweep, VDD=5V VCC=Sweep, VDD=5V VCC=12V, VDD=5V VCC=12V, VDD=Sweep VCC=12V, VDD=Sweep VCC=12V, VDD=5V VCC=12V, VDD=5V CDLY=Sweep VCC=12V, VDD=5V VCC=12V, VDD=5V CDLY=220nF CNTL1 = High - - - - - - - - 9.1 100 3.0 3.6 50 2.90 -17.0 2.3 4.5 0 - 2.07 65 - -200 55 20 20 20 7 9 30 9 9.45 200 3.2 3.95 100 3.23 -13.5 2.5 - - 40 - 100 - -165 65 25 25 25 12 15 50 14 9.8 300 3.4 4.3 150 3.55 -10.0 2.7 VDD 0.5 - - 160 1.43 -130 mA mA mA mA mA mA mA mA V mV V V mV V uA V V V ms V uA V uA 5V line supply current 1 5V line supply current 2 5V line supply current 3 5V line supply current 4 12V line supply current 1 12V line supply current 2 12V line supply current 3 12V line supply current 4 POWER MONITOR Threshold voltage level for 12V Hysteresis on 12V comparator Adjustable pin voltage for 12V Threshold voltage level for 5V Hysteresis on 5V comparator Adjustable pin voltage for 5V POWER ON RESET GENERATOR Charging current for POR Capacitor POR threshold voltage Output high voltage Output low voltage Power on reset delay(2) CONTROL INPUT
(3)
Symbol
Condition
Min.
Typ.
Max.
Units
Logic control input 1 HIGH voltage Logic control input 1 HIGH current Logic control input 1 LOW voltage Logic control input 1 LOW current
11
FAN8620B
Electrical Characteristics (Continued)
(Ta=25C, unless otherwise specified) Parameter RUNNING MODE CHECK Back-EMF threshold voltage(2) FG output high voltage FG output low voltage Running mode check SPINDLE FG GENERATION FG frequency FG duty SPINDLE PWM CONTROL PWM high level input voltage(2) PWM low level input voltage
(2)
Symbol VBTH VFGH VFGL RM1 FG DTFG VSPMH VSPML IPSP1 VSP2 IPSP2 VSP1 VSPD VSP3 ICFSP1 ICFSP2 VBC VBH VBL
Condition - - - U=V=W=5V, N=100Hz U,V,W=120 shift pulse(100Hz) U,V,W=120 shift pulse(1KHz) - - PWMSP=100% PWMSP=100% PWMSP=0% PWMSP=0% - PWMSP=50% PWMSP=0%, CFSP=2.5V SPMSP=100%, CFSP=2.5V - (Test only) -
Min. 65 4.5 - - 45 3.0 - 100 1.5 -200 3.1 1.2 2.35 -200 100 11.0 - -
Typ. 80 - - 100 300 50 - - 150 1.7 -150 3.3 1.6 2.5 -150 150 - VDD -
Max. 95 - 0.5 - - 55 - 2.0 200 1.9 -100 3.5 2.0 2.65 -100 200 - - 0.5
Units mV V V Hz Hz % V V uA V uA V V V uA uA V V V
High input current at PWMSP CFSP voltage2(100% duty of PWMSP) Low input current at PWMSP CFSP voltage1(0% duty of PWMSP) CFSP voltage amplitude CFSP voltage3 (50% of PWMSP) CFSP charging current CFSP discharge current BRAKE CBrake output voltage Brake output high voltage Brake output low voltage
12
FAN8620B
Electrical Characteristics (Continued)
(Ta=25C, unless otherwise specified) Parameter PWM high level input voltage(2) PWM low level input voltage
(2)
Symbol VSFMH VSFML IPFP1 VSF2 IPSF2 VSF1 VSFD VSF3 ICFSF1 ICFSF2 VSU5U VSU5V VSU5W VSV5L VSU5L VSU5L FU FV FW IULQU IVLQU IWLQU IULQL IVLQL IWLQL GMSP ICOMP1 ICOMP2 ICOMP3
Condition - - PWMSF=100% PWMSF=100% PWMSF=0% PWMSF=0% - PWMSF=50% PWMSF=0%, CFSP=2.5V SPMSF=100%, CFSP=2.5V RU,RV,RW=5 RU,RV,RW=5 RU,RV,RW=5 RU,RV,RW=5 RU,RV,RW=5 RU,RV,RW=5 CNTL2=12KHz CNTL2=12KHz CNTL2=12KHz - - - - - - RU,RV,RW=5 PWMSP=0% PWMSP=50% PWMSP=100%
Min. 3.0 - 100 2.60 -200 2.10 425 2.35 -150 50 - - - - - - - - - -10 -10 -10 -20 -20 -20 - -10 -400 -750
Typ. - - 150 2.75 -150 2.25 475 2.50 -100 100 - - - - - - 1 1 1 0 0 0 0 0 0 0.85 0 -300 -630
Max. - 2.0 200 2.90 -100 2.40 525 2.65 -50 150 0.9 0.9 0.9 0.8 0.8 0.8 - - - 10 10 10 20 20 20 - 10 -200 -500
Units V V uA V uA V mV V uA uA V V V V V V KHz KHz KHz uA uA uA uA uA uA A/V uA uA uA
SPINDLE PWM SOFT COMMUTATION
High input current at PWMSF CFSF voltage2(100% duty of PWMSF) Low input current at PWMSF CFSF voltage1(0% duty of PWMSF) CFSF voltage amplitude CFSF voltage3 (50% of PWMSF) CFSF charging current CFSF discharge current SPINDLE OUTPUT U saturation voltage_upper V saturation voltage_upper W saturation voltage_upper U saturation voltage_lower V saturation voltage_lower W saturation voltage_lower U output frequency V output frequency W output frequency Leakage current U upper Leakage current V upper Leakage current W upper Leakage current U lower Leakage current V lower Leakage current W lower Transconductance gain SPM CCOMP charging current1 CCOMP charging current2 CCOMP charging current3
13
FAN8620B
Electrical Characteristics (Continued)
(Ta=25C, unless otherwise specified) Parameter REGULATOR Adjustable PIN voltage Regulator output voltage Regulator line regulation(2) Regulator load regulation(2) VCM PWM CONTROL High PWMH input current Low PWMH input current High PWML input current Low PWML input current PWMH high level input voltage PWMH low level input voltage PWML low level input voltage CFVCM voltage1 CFVCM voltage5 CFVCM voltage9 PWM current ratio (VCM) PWMH current variation PWML current variation VCM PWM FILTER Maximum phase shift(2) Filter cut-off frequency(2) Filter attenuation at 1MHz
(2) (2) (2)
Symbol VADJ VREG RLINE RLOAD IPWMH1 IPWMH2 IPWML1 IPWM2 VPWMH1 VPWMH2 VPWML1 VPWM2 VCFVC1 VCFVC5 VCFVC9 RPWM IVPWM IVPWM DF FCO aFILTER
Condition - - - IO = 500mA PWMH = 100% PWMH = 0% PWML = 100% PWML = 0% - - - - PWMH=100%,PWML=100% PWMH=50%,PWML=50% PWMH=0%,PWML=0% - - - Measure at 500HZ, CFVCM=10nF - -
Min. 1.29 3.1 - - 36 -200 36 -200 3.0 - 3.0 - 5.56 3.80 1.66 - 1.2 17.7 - - -
Typ. 1.31 3.3 - - 48 -150 48 -150 - - - - 5.95 4.00 2.05 64 1.3 20.3 - 100 70
Max. 1.33 3.5 2.0 2.0 60 -100 60 -100 - 2.0 - 2.0 6.34 4.20 2.44 - 1.4 22.3 2 - -
Units V V % % uA uA uA uA V V V V V V V - mA uA deg kHz dB
PWML high level input voltage(2)
(2)
14
FAN8620B
Electrical Characteristics (Continued)
(Ta=25C, unless otherwise specified) Parameter VCM REFERENCE VOLTAGE VCM reference voltage VCM ERROR AMPLIFIER Amplifier output high Amplifier output low Short circuit current Input offset
(2)
Symbol VREF VEOH VEOL IESC VOSE AVE BGE VSOH VSOL ISSC VOSE BGS gain1(2)
(2)
Condition CNTL3= High - - - - - - - - - - - Gainsel=High Gainsel=Low - - - - -
Min. 3.8 10.8 - 8 -15 - - 10.8 - 10 -15 - - - - 11.0 - -15 -
Typ. 4.0 - - - 0 80 2 - - - 0 2 18 6 22.9 - - 0 2
Max. 4.2 - 1.2 - 15 - - - 1.2 - 15 - - - - - 1.0 15 -
Units V V V mA mV dB MHz V V mA mV MHz dB dB dB V V mV MHz
voltage(2)
(2)
Error amplifier open loop gain(2) Unit gain bandwidth VCM SENSE AMPLIFIER Amplifier output high Amplifier output low Short circuit current(2) Input offset voltage(2) Unit gain bandwidth
(2)
Sense amplifier voltage
AVS1 AVS2 APO VPOH VPOL VOSE BGP
Sense amplifier voltage gain2 VCM POWER AMPLIFIER Power Amplifier gain
Power Amplifier output high voltage Power Amplifier output low voltage Input offset voltage(2) Unit gain bandwidth(2)
15
FAN8620B
Electrical Characteristics (Continued)
(Ta=25C, unless otherwise specified) Parameter VCM AMPLIFIER TOTAL VCM offset current VCM transconductance gain high VCM transconductance gain low VCM+ saturation voltage lower VCM- saturation voltage upper VCM+ saturation voltage upper VCM- saturation voltage lower Leakage current power Amplifier1 RETRACT Min. operating voltage of CRET2 Source voltage Sinking saturation voltage Retract sinking current1 Retract sinking current2 Upper power transistor leakage Lower power transistor leakage THERMAL SHUT DOWN Operating temperature Thermal hysteresis TSD THYS - - - - 150 30 - - C C VCRET2 VSRC VRTSAT IRCT1 IRCT2 ILRET1 ILRET1 CRET2=Sweep CRET2=5V CRET2=5V Rret=8.0K Rret=4.2K - - - - - 40 80 -10 -10 - - - 58 100 0 0 3.6 1.2 0.7 76 130 10 10 V V V mA mA uA uA IOSVCM GMVH GMVL VVMS1 VVMS2 VVMS3 VVMS4 IVCML1 PWMH=PWML=50% duty Gainsel=Low Gainsel=High Rvcm=15 Rvcm=15 Rvcm=15 Rvcm=15 - -20 - - - - - - -20 0 0.45 0.11 - - - - 0 20 - - 0.7 0.7 0.7 0.7 20 mA A/V A/V V V V V uA Symbol Condition Min. Typ. Max. Units
Notes: 1. No Spindle or VCM Load. 2. Guaranteed by Design. 3. Logic control input2 & 3 spec's are equal to logic control input1.
16
FAN8620B
Application Information
Spindle Motor Drive Circuit
The FAN8620B is a combination chip consisting of spindle motor and voice coil motor designed for HDD system. According to the spindle conditions, the digital ASIC provides optimum control signals (Start-up, commutation, speed control, and commutation mode) to the FAN8620B. Back-EMF (BEMF) signal of the spindle motor is fed back to ASIC via FG line. The MCLK and PWM signals are used to determine the commutation timing and to control the spindle speed, respectively.
Spindle Driver
The spindle includes both low and high side drivers (H-bridge) for a three-phase sensorless brushless DC motor. To reduce the saturation voltage, the vertical PNP transistor is used as the high side driver.
Frequency Generation (FG)
FG stands for Frequency Generation. It is the output signal to the ASIC. It contains important information about the motor speed. According to the FG frequency, the digital ASIC provides different motor clock signals to the motor drive IC via MCLK. It checks the motor speed to send the VCM enable signal via CNTL3. FG frequency (Hz), motor speed (rpm) and pole number are directly related as shown below in the three phase motor. FG frequency(Hz) = motor speed(rpm) x pole number / 2 x 3 / 60 In a typical application,(8 pole motor) FG frequency = 5400 x 8 /2 x 3 / 60 = 1080 [Hz]
MCLK & Mask
The MCLK is a motor clock used as the standard clock signal for the proper commutation timing of the spindle motor. It is supplied by the ASIC. As shown in table 1, it has different delay times depending on the mode of the spindle. MCLK (Td) Start-up mode Acceleration mode Running mode 2ms (External ASIC) FG(n-1) / 2 FG(n-1) / 32 Table 1. After the FG_Edge signal detection, the MCLK occurs after a half FG_Edge delay time in the acceleration mode and 1/ 32 FG_Edge delay time in the soft commutation mode. MASK 1ms FG(n-1) / 4 344.45ms Commutation Hard Hard Soft
17
FAN8620B
Mask
When the coil current is abruptly changed in a short time interval, a spark voltage occurs. This spark voltage mixes with the FG output to give the wrong spindle information to the ASIC. To eliminate the spark voltage from the FG output, the masking circuit is needed.
di Vcoil = - L ---dt
W_BEMF V_BEMF U_ BEMF
U_Comp
120
V_Comp
W_Comp 60 FG
FG_Edge Electrically 30 Delay MCLK
Figure 1. BEMF, FG, and MCLK in the acceleration mode
FG 8msec
commutation noise, false zero cross
FG 2msec 2msec
MCLK 1msec 1msec
MASK
Figure 2. MCLK vs MASK in the start-up mode
18
FAN8620B
FG 8msec, T1
T2
commutation noise, false zero cross
FG T1/2 T2/2
MSLK
T1/4
T2/4
MASK
Figure 3. MCLK vs MASK in the acceleration mode
PWMDEC and Speed Control
Motor speed is measured by the ASIC via the FG output. The digital ASIC compares FG frequency with the target motor speed and sends the speed compensation signal to the PWMSP input of the FAN8620B. This PWM signal is internally filtered and is converted into DC voltage through the built-in PWM Decoder Filter. The analog output of the filter depends on the duty of the PWM signal. The filter is a 3rd order, low-pass filter. The first pole location of the filter is determined by the external capacitor connected to pin(48) CFSP.
1 0.5 1 0.5 Ispindle = ( D - D MIN ) -------------------------------------- -------------- = ( D - 0.13 ) -------------------------------- ---------R33 + R METAL D MAX R33 + 0.074 0.87
ISPM (mA) 1400.0 1200.0 1000.0 800.0 600.0 400.0 200.0 0.0 0 10 20 30
PWM SP vs ISPM Io(mA)
40
50 Duty(%)
60
70
80
90
100
Figure 4. Spindle current vs PWMSP duty variation ( R33 = 0.25 )
19
FAN8620B
Start-up Mode
In the sensorless BLDC motor the Back-EMF is used to determine the rotor position. At standstill condition, there is no Back-EMF voltage and no FG output. There is no information about the motor position. To drive the spindle in the start-up mode, the digital ASIC sends the spindle enable signal via CNTL1 and supplies the HIGH or OPEN signal via CNTL2 to be used as commutation signal of the spindle motor. The digital ASIC continuously provides HIGH or OPEN signal until the Back-EMF generated is large enough to produce the FG signal for the self commutation. During a fixed time, if the Back-EMF generated is too small and the spindle motor is not driven by the self commutation, the ASIC resets all signals and retries the spindle. CNTL1(1) SPM driver High Open (Floating) Low 1 0 0 0 0 1 CNTL2(2) Hard Hard Soft 1 0 0 CNTL3(3) VCM driver Retract 0 0 1 GAINSEL SPM driver Normal x Start up Hold
(5)
Brake Commutation
VCM gain 0.11 x 0.45
Notes: 1. CNTL1: Spindle motor control 2. CNTL2: commutation mode control 3. CNTL3; VCM control 4. "1": Enable; "0": disable; Test only
Acceleration Mode
When the Back-EMF detected is large enough to determine motor position, the mode is changed from start-up to acceleration. The ASIC sends the optimum commutation timing signal via MCLK according to the FG input. By using the Back-EMF, the spindle is self-commuted at acceleration and running modes. During the motor drive, the spindle motor is commuted at a point which is electrically 30 delayed after the FG_Edge.
Running Mode
The running mode is when the spindle motor speed arrives within 1% of the target speed. The commutation mode, commutation delay time, MCLK delay time (Td) and masking time are changed at the running mode. The spindle motor speed is controlled by PWM signal within 0.01%. The soft commutation using the current slope of the motor may reduce audible noise, EMI (Electromagnetic Interference) and spark voltage which is generated on the motor coil commutation.
20
FAN8620B
CNTL1 SPINdle ON
High Open Low High Open Low
CNTL2
FG +1% Target RPM -1%
Rotation Speed Start-Up Hard-commutation Soft-commutation
Internal Ready 10msec Internal commutation Mode Change 100msec CNTL3 VCM ON High Open High CASE1 : High gain Low High CASE1 : Low gain Low VCM Enable
Figure 5. Motor start-up sequence
Duty (%) 100%
D%
0
F trarget
FG Frequency
Figure 6. FG vs PWMSP duty variation
21
FAN8620B
(1) Acceleration Mode: Hard-Commutation Mode
+ U_BEMF 0 -
+ V_BEMF 0 -
+ W_BEMF 0 -
SOURCE Iu SINK
SOURCE Iv SINK
SOURCE Iw SINK
(2) Running Mode: Soft-commutation Mode
SOURCE Iu SINK
SOURCE Iv SINK
SOURCE Iw SINK
Figure 7. Acceleration and running the spindle motor
22
FAN8620B
Start
High frequency Noise Elimination
Using filtered FG Generate start Counter
Counting the FG duration
Hard commutation
NO
Saturation =?
NO MCLK = FG(n-1)/32 MASK = 344.45usec Running MCLK = FG(n-1)/2 MASK = FG(n-1)/4
YES Waiting 2msec MCLK generation
Acceleration Retry MASK = 1msec FG polarity Check = SAME?
YES Start up Keep going Waiting for FG edge
Store count Value of the FG
Figure 8. MCLK generation flow chart
23
FAN8620B
Voice Coil Motor VCM Driver
The voice coil motor driver is linear, class AB, H-bridge type driver, It includes all power transistors. After the VCM is enabled via CNTL3, the VCM current level is controlled by two PWM signals. The input voltage level at pin PWMH weighs, at a maximum, 64 times more than the input voltage at pin PWML. These PWM signals are filtered by an internal secondorder low-pass filter and converted into PWMOUT (DC Voltage). The filter PWMOUT depends only on the duty cycle and not on the logic level. The PWM Filter's pole is adjustable by pin CFVCM connected to the external capacitor.
R1 PWMH input 13 R2 1/2 VDD
Vin
Gm +
VREF(4V)
3k + -
C1
R1 PWML input 14 R2 1/2 VDD
Vin
A Gm + 15
R1
R1 + C1 Filtout 18
CFVCM
Figure 9. PWM decoder & filter schematic 2
17 9 C9
VCC R7 HALFVCC R5 + R5 VREF(4V) PWM decoder &Filter R5 + + R5 -
PGND 26
VCM+
27
v+
L
PVCC 21 Sense
VCM
RL
19 IVCM Rsense
R4 R3 vb Gain: 8,2 + R3
22 R6 + vs VCM-
v-
Filtout 18
Errin 28
Errout
Senseout 30 25 12 Gainsel
VREF(4V)
R18
Rext
Cext R25
Figure 10. VCM driver schematic
24
FAN8620B
The transconductance of VCM amplifier gain, Gm, is:
I VCM 2 Aerror Apower R25 Gm = ------------ = --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Vin 2 R18 Rsense As Aerror Apower + ( R18 + R25 ) ( Z VCM + Rsense ) Aloop R25 1 1 -Gm = ------------------------- ---------- --------------------- ------ 1 + Aloop R18 Rsense As 2 R18 As Aerror Apower Aloop = --------------------------------------------------------------------------------( R18 + R25 ) ( Z VCM + Rsense )
Therefore Aloop >>1,
R25 1 1 Gm ---------- --------------------- ------ 2 R18 Rsense As
The transconductance (Gm) can be adjusted by selecting the external components R18, R25 and sense resister Rsense. if R18 = R25, Rsense = 1 GAINSEL = Low, 1 / AS = 0.45 Gm = 0.45 GAINSEL = High, 1 / AS = 0.11 Gm = 0.11 VCM current (IVCM) is:
1R25 11Imotor = 4 x ( PWMH - 0.5 ) + ----- ( PWML - 0.5 ) x ---------- x --------------------- x ------32 R18 Rsense AS NOTES: PWMH = 1 when 100% duty PWMH = 0.5 when 50% duty PWMH = 0 when 0% duty
25
FAN8620B
Retract Circuit
The retract function is the operation where the VCM moves from the data zone to the parking zone. It is off in the normal state. It operates when power interrupt causes the spindle to stop.
U V W Bandgap Reference
_
Retract Enable
_
+ 2K 24 Rret
21 20 Q19 x 300 VA Iref 2V Iret VCM 19 Cret2
Iretdly
+
27
16 R16
Cret
Figure 11. Retract block schematic
VA = 2.0V 2 x RretVret = ------------------------ - V BE, Q19 [ V ] Rret + 2k
26
FAN8620B
Power Management Features
Low Power Interrupt:
The low power interrupt operation occurs when the power supply voltage (5V,12V) level drops below each threshold voltage. The threshold voltage (Vth) and time delay (Tdly) may be adjustable by the external component value.
Vth Tdly = CDLY -------- ,( Vth = 2.5V , I = 14A) I
VDD 11 VDD VCC I = 14A R4 5V SENSE 4 12V SENSE 42 R5 R8 R7 + + + _ Q15 _ 12 POR CDLY
2.5V
TSD
R4 = 7k, R5 = 11k R7 = 25k, R8 = 9k
Figure 12. Power on reset block schematic
Power on Reset
The power-on reset circuit monitors the voltage level of both +5V or +12V power supplies and chip temperature (thermal shut down). The power-on reset circuit disables the spindle and VCM circuit when the power supply voltage level drops below the reference voltage.
VDD, VCC Vth Vhys
T POR
Tdly Vbe
T
Figure 13. Power on reset function
27
FAN8620B
Vhys = 53mV R4 + R5 VDD ;Vhys ( 5V ) = --------------------- x Vhys R5 R7 + R8 VDD ;Vhys ( 12V ) = --------------------- x Vhys R8
Default (pin4, pin42 : not connected)
VDD, th 4.1V VCC ,th 9.4V
7k + 11k VDD ;Vhys ( 5V ) = ---------------------- x 53mV 90mV 11k 25k + 9k VDD ;Vhys ( 12V ) = ---------------------- x 53mV 200mV 9k
Regulator
The FAN8620B includes the voltage regulator for ASIC and other circuits. It consists bias circuit, the band gap reference and the external NPN power transistor. The regulator voltage can be adjusted by the external resistor, R3a, R3b.
VREG
=
VREF 1 + R3a , VREF ----------
R3b
= 1.3V
VDD
Bias Block
Bandgap Reference
Vref
+ 7 -
VREF
VREG R3a Vadjust 3
R3b
Figure 14. low drop regulator schematic
if R3a = 20k, R3b = 13k
VREG
=
VREF 1 + R3a ---------
R3b
20k = 1.3 x 1 + --------- = 3.3V 13k
28
FAN8620B
STR_CLK BEMF DETECTION STR_MASK
U_OUT
FG
Figure 15. Start-up mode
MCLK*2
U_OU T
FG
Figure 16. Acceleration mode 1
T1/4
2msec T1/2 MCLK*2 T1 U_OUT
FG
Figure 17. Acceleration mode 2
29
FAN8620B
U_OUT
V_OUT
W_OU T
Figure 18. Output in hard-commutation mode
Switching Mode Conterting
FG
COM
O utput
Figure 19. commutation mode converting
U_OU T
V_OU T
W _OU T
Figure 20. Soft-commutation mode
30
FAN8620B
Figure 21. VCM recalibration flow
31
FAN8620B
Vrret
Iret
Vvcm
Figure 22. Retract & break at power off
32
FAN8620B
Typical Application Circuits
5V Q1 C11 SENSE5 SENSE12 4 42 11 CDLY POR 10 Power On Reset Thermal Shutdown FG 6 MCLK 8 CNTL1 44 CNTL2 45 CNTL3 46 C38 38 PWMSP C48 PWMSF 1 C2 2 CCOMP PWM Decoder & Filter PWM Decoder & Filter Retract VCM enable PWMH PWML C15 15 C9 9 HALFVCC VCMREF4V VCM SENSE + Gain:8,2 GAINSEL 12 23, 35 GND R25 R18 R30 C30 SENSEOUT 25 18 ERRIN 28 ERROUT 30 17 VCC VDD 5 FILOUT SENSE Amplifier 13 14 PWM Decoder & Filter VCC Retract 24 RRET R16 VCM+ VCM16 PVCC 21 CRET C16 Q16 Vlimit AMP 3 State Input Control Commutation & Spindle Motor Control 37 V 3-phase Output Driver 34 W 32 R33 33 PCS SUBGND 12V D1 41 PVCC U FG Generator 7 VREF Bandgap Reference & Bias Zero Cross Detector 3 ADJ 36 39 N V M39a C39 W M39b R3a R3b GND
43
Brake AMP
U V W Brake Cbrake
Brake
C40 40
47 48
31 U V W 20
CRET2 R24
C20
+ +
VCM-
22 Rsense
D2
+
Gain:14
SENSE 19 VCM+ 27 D3 PGND 29 26
CS RS
D4
+5V
33
FAN8620B
Application Circuits
R42a 12V R4a 5V
R42b 12V R4b C11 D4 VREG 4 SENSE5 42 SENSE12 11 CDLY 17 5, 29 VDD VREF ADJ 7 Q1 3 U BRAKE 39 C39 CBRAKE 40 PVCC1 41 N 36 U 37 34 C40 M39a v M39b 2003 12V R3a R3b C3 VCC 5V
POR FG MCLK CNTL1 CNTL2 CNTL3 PWMSP PWMSF PWMH PWML C48 Digital Custom ASIC C2 C9
10 6 8 44 45 46 47 1 13 14 48 2
CFSP CFSF CFVCM HALFVCC
C15 15
FAN8620B
V
U
9 V GAINSEL 12 +12V D2 Rsense 19 SENSE 22 VCMW CCOMP 33 PCS 21 PVCC2 CRET2 20 27 18 D3 VCM+ FILOUT 25 R18 R25 ERRIN 28 RRET CRET GND ERROUT 30 24 16 R16 C16 Q16 R24 D1 C20 R33 12V 32 38 C38 W
CS RS
SENSEOUT
23, 26, 31, 35
To Pin19
: option
R30 C30
34
FAN8620B
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 12/1/00 0.0m 001 Stock#DSxxxxxxxx 2000 Fairchild Semiconductor International
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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